In the microwave switching art, switches incorporating the general principles of the FET (field effect transistor) figure prominently. Such devices generally feature laterally spaced source and drain electrodes connected to respective source and drain regions in a semiconductor substrate. The source and drain regions are laterally separated by a channel region therebetween. In the case of the common IGFET (insulated gate FET) the substrate is covered with at least one layer of insulating material, typically a semiconductor oxide, and a gate or control electrode is positioned thereon overlying at least a limited area of the channel region. A bias voltage applied in some manner to the gate electrode controls the conductivity of the channel, thereby effecting at least two states of conduction ("on" and "off").
The device described generally above has been adapted to the switching of signals in many frequency ranges, including microwave. This range of frequencies varies from one to approximately three hundred gigahertz, including a number of significant frequency bands.
Devices incorporating the general FET principle of operation (i.e. varying the conductivity of a predetermined circuit path) have been adapted to the microwave range, as noted above. One method of so doing has involved the provision of alternative conductive paths. One path may be biased to two different conductivity states while the other path is of high resistivity (non-insulative). The two paths, in shunt relationship, pass essentially all of the microwave signal through the substrate when the variable conductivity path is biased to its high conductivity state and little, if any, of the signal when the path is biased to low conductivity, as the highly resistive element remains a near open circuit to the microwave signal. Provision of a high resistivity "off" state path results in a device having a large power handling capacity. An example of such a microwave switch is disclosed in U.S. Pat. No. 3,700,976, issued to Dill for "Insulated Gate Field Effect Transistor Adapted for Microwave Applications". This Patent, the property of the assignee herein, discloses a silicon switch having two shunted circuit paths through two separate layers of semiconductive material separated by an electrically insulative layer therebetween. A highly resistive polysilicon layer is formed atop the insulating layer while a channel of variable conductivity between laterally spaced, source and drain regions formed in the silicon substrate is normally non-conductive and, due to the high resistivity of the polysilicon layer the unbiased device is essentially an open circuit ("off" state). An "on" state is achieved by the application of a proper bias to the highly doped regions resulting in the injection of electrons into the channel and consequent increased channel conductivity.
The Dill device, although desirable, is not well suited to low noise operation at higher frequencies. The device is frequency limited by its necessary fabrication upon a silicon substrate. Such a materials choice is occasioned by the use of an insulating oxide layer to separate the conductive channel from the highly resistive gate.
A much more desirable materials technology for microwave frequencies is gallium arsenide (GaAs). The high carrier mobility of this material (relative to silicon, among others) forms the basis for this preference. Unlike geometries amenable to silicon devices, however, the fabrication and design of GaAs devices is complicated by the difficulty encountered in the fabrication of a reliable insulator on a GaAs substrate. In the standard metal semiconductor FET (MESFET), source and drain electrodes are positioned on either side of a metal gate. The three metallizations lie directly atop a doped gallium arsenide substrate, the drain and source electrodes forming ohmic contacts with the GaAs while the gate forms a Schottky barrier. As the formation of a high quality insulative oxide layer on gallium arsenide is not feasible at the present time, the Schottky barrier is used to control channel conductivity. With no bias voltage, the highly doped channel region provides a high conductivity path between the drain and source electrodes, thus providing a low noise path for the high frequency signal in the high carrier mobility GaAs channel. To achieve an "off" state, the gate, which forms a Schottky barrier with the channel, is so biased as to deplete the channel of all carriers. (The drain and source, neither of which forms a Schotty barrier with the substrate, act as electron "sinks"). The MESFET lacks the power handling capability of the insulated gate technology described above as the above-described presence of a gate metallization has a tendency to reduce both the drain-to-source and the gate-to-source breakdown voltages. Additionally, the basic MESFET geometry places an effective lower limit, both physical and in the terms of economy of manufacture, upon the channel length of such a device. The metallic source, gate and drain thereof present a potential short if not carefully aligned when, as in the basic structure, all three electrodes, or ohmic contacts, lie atop the GaAs substrate. It can be shown that the channel's resistance is proportional to its length and, therefore, the minimization thereof is highly desirable in terms of minimizing the insertion loss, power consumption and other circuit parameters effected thereby.
A commonly attempted solution to the problems associated with the planar MESFET has been the processing of the GaAs substrate to form an intrinsic channel so that the metallic gate lies below the level of the source and drain. In this way, the length of the gate is effectively the length of the channel as the source-to gate and drain to-gate spacings lie in a plane perpendicular to the plane of the channel.
This approach has been employed and illustrated in a number of patents including U.S. Pat. No. 3,898,353 issued to Napoli et al, for "Self Aligned Drain and Gate Field Effect Transistor" and French Brevet D'invention No. 70.29258 of Thomson-CSF for "Improvement to Field-Effect Transistor" ("Aux Transistors a'Effect de Champ"). The devices disclosed in these patents and others which feature the recess of the metallic gate within the doped GaAs substrate are hampered in operation by parasitic capacitances resulting from this design approach, including a source-to-drain parallel plate capacitance, which may substantially degrade the switching function at high frequencies.